29 research outputs found

    Simple, continuous and consistent physics based model for flicker noise in MOS transistors

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    Although there is still controversy about its origin, the designer requires accurate models to estimate 1/f noise of the MOS transistor in terms of its size, bias point and technology. Conventional models present limitations, they usually do not consistently represent the series-parallel association of transistors and they may not provide adequate results for all the operation regions, particularly moderate inversion. In this work we review current flicker noise models, paying particular attention to their behavior along the different operation regions and to their seriesparallel association properties. We present a physics based model for flicker noise following classical carrier fluctuation theory. With the aid of a compact, continuous model for the MOS transistor it has been possible to integrate the contribution to drain current noise of the whole channel area arriving at a consistent, continuous, and simple model for the 1/f noise

    A fully integrated 0.5 -7 hz cmos bandpass amplifier

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    In this paper, the design methodology of a fully integrated gm-C, 0.5-7Hz band-pass amplifier is presented. The amplifier is designed to be employed in signal conditioning of a piezoelectric accelerometer, which is part of an implantable biomedical device. Transconductances of the OTAs range from 30pS to 100nS. Such low values of transconductances, which are required owing to the large time-constants involved, were obtained with the aid of a current division technique. Measurement results for OTA structures and part of the filter fabricated in a standard 0.8μm technology are presented

    A fully integrated physical activity sensing circuit for implantable pacemakers

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    PostprintThis paper shows the implementation of a fully integrated Gm-C 0.5-7Hz bandpass filter-amplifier with gain G=400, for a piezoelectric accelerometer which is part of a rate adaptive pacemaker. The fabricated circuit operates up to 2V power supply, consumes only 230nA current, and achives 2.1μVrms input noise. Detailed circuit specifications, measurements, and a comparative analysis of the system performance are presented

    Series-parallel association of transistors for the reduction of random offset in non-unity gain current mirrors

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    Postprint. Trabajo presentado en IEEE International Symposium on Circuits and Systems, 2004In this paper the series-parallel association of transistors applied to current mirrors with a non-unity copy factor is studied with regard to mismatch. This technique has been demonstrated to be a valuable tool in the design of low-offset oriented analog circuits. Some measurements are presented as well as a minimum offset design

    Consistent model for drain current mismatch in mosfets using the carrier number fluctuation theory

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    PostprintThis work presents an approach for accurate MOS transistor matching calculation. Our model, which is based on an accurate physics-based MOSFET model, allows the assessment of mismatch from process parameters and valid for any operating region. Experimental results taken on a test set of transistors implemented in a 1.2 /spl mu/m CMOS technology corroborate the theoretical development of this work

    Pico-A/V range CMOS transconductors using series-parallel current division

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    PostprintA simple design procedure for very small transconductors withextended linear range, using series-parallel division of current, ispresented. It is based on a previously reported one-equation all-region transistor model. Using this technique, a 33 pico-A=V trans-conductor equivalent to a 30 GOresistor is demonstrated

    A Fully Integrated Physical Activity Sensing Circuit for Implantable

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    ABSTRACT This paper shows the implementation of a fully integrated G m -C 0.5-7Hz bandpass filter-amplifier with gain G=400, for a piezoelectric accelerometer which is part of a rate adaptive pacemaker. The fabricated circuit operates up to 2V power supply, consumes only 230nA current, and achives 2.1µV rms input noise. Detailed circuit specifications, measurements, and a comparative analysis of the system performance are presented

    CMOS analog design using all-region MOSFET modeling

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